Use of Natural Information Redundancy in On-Line Testing of Computer Systems and their Components

Abstract

This paper is devoted to the problem of on-line testing the digital circuits in the use of natural information redundancy for results calculated during the performing arithmetic operations on approximate data. Those data are represented usually in floating-point formats. It’s shown the dominant development of computer systems in critical applications that support approximate calculations performed on the measurement results obtained from sensors. Information redundancy is considered as the basis for solving analysis issues, including the on-line testing of digital circuits. The existence of natural information redundancy in the result codes of all arithmetic operations on approximate data is proved. These codes contain forbidden values that are calculated under the action of faults. Another type of natural information redundancy inherent in data formats in unused positions is considered as well. The role of natural information redundancy in a version form for increasing the checkability of the circuits and trustworthiness of result in the FPGA components of safety-related systems is noted.