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A method of hidden faults opposition for FPGA-based components of safety-related systems

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dc.contributor.author Drozd, Oleksandr
dc.contributor.author Romankevich, Vitaliy
dc.contributor.author Romankevich, Alexei
dc.contributor.author Kuznietsov, Mykola
dc.contributor.author Drozd, Myroslav
dc.contributor.author Дрозд, Олександр Валентинович
dc.contributor.author Романкевич, Віталій Олексійович
dc.contributor.author Романкевич, Олексій Михайлович
dc.contributor.author Кузнєцов, Микола Олександрович
dc.contributor.author Дрозд, Мирослав Олександрович
dc.contributor.author Дрозд, Александр Валентинович
dc.contributor.author Романкевич, Виталий Алексеевич
dc.contributor.author Романкевич, Алексей Михайлович
dc.contributor.author Кузнецов, Николай Александрович
dc.contributor.author Дрозд, Мирослав Александрович
dc.date.accessioned 2020-09-28T06:30:22Z
dc.date.available 2020-09-28T06:30:22Z
dc.date.issued 2020
dc.identifier.citation Drozd, O., Romankevich, V., Romankevich, A., Kuznietsov, M., Drozd, M. (2020). A Method of Hidden Faults Opposition for FPGA-Based Components of Safety-Related Systems. CEUR-WS, Vol. 2608, p. 311–322. en
dc.identifier.citation A Method of Hidden Faults Opposition for FPGA-Based Components of Safety-Related Systems / O. Drozd, V. Romankevich, A. Romankevich, M. Kuznietsov, M. Drozd // CEUR-WS. – 2020. – Vol. 2608. – P. 311–322. en
dc.identifier.issn 1613-0073
dc.identifier.uri http://ceur-ws.org/Vol-2608/
dc.identifier.uri http://ceur-ws.org/Vol-2608/paper24.pdf
dc.identifier.uri http://dspace.opu.ua/jspui/handle/123456789/11039
dc.description.abstract The paper is devoted to the problem of hidden faults, which is inherent in safety-related systems aimed at ensuring the functional safety of high-risk facilities to counter accidents. The problem of hidden faults is considered from the perspective of a resource-based approach as a problem of growth from a lower level of replication to the next level of diversification in the development of models, methods and means. Computer systems in critical applications have risen to the level of diversification in the division of the operating mode into normal and emergency, in the input data and structurally functional checkability, which for digital components have become different in these modes. Digital components continue to be traditionally stamped based on matrix structures that reflect the level of replication. The lag of the components from the development of the system creates a problem of hidden faults which can be accumulated during the normal mode and reduce the fault tolerance of the components and the functional safety of the system in emergency mode. We propose a method of counteracting hidden faults by raising components to the level of diversification in the promising field of FPGA designing. The proposed method uses the natural version redundancy inherent in the program code of the FPGA projects with LUT-oriented architecture. The method generates and selects versions of the program code, reducing many hidden faults of short circuits between neighboring inputs of LUT units. Possible hidden faults are eliminated by increasing the checkability of the FPGA project in normal mode and the trustworthiness of the results calculated in emergency mode. en
dc.language.iso en en
dc.subject safety-related system en
dc.subject digital component en
dc.subject FPGA project en
dc.subject LUT unit en
dc.subject program code en
dc.subject hidden fault en
dc.title A method of hidden faults opposition for FPGA-based components of safety-related systems en
dc.type Article in Scopus en
opu.kafedra Кафедра комп’ютерних інтелектуальних систем та мереж uk
opu.kafedra Кафедра інформаційних систем
opu.citation.journal CEUR-WS en
opu.citation.volume Vol. 2608 en
opu.citation.firstpage 311 en
opu.citation.lastpage 322 en
opu.staff.id drozd@opu.ua en
opu.staff.id kuznietsov@opu.ua en
opu.staff.id myroslav.drozd@opu.ua en


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