eONPUIR

Investigation of reconfigurable hardware platformsfor 5G protocol stack functions acceleration

Показать сокращенную информацию

dc.contributor.author Melnyk, Viktor
dc.contributor.author Мельник, Віктор Анатолійович
dc.contributor.author Мельник, Виктор Анатольевич
dc.contributor.author Hamolia, Vladyslav
dc.contributor.author Гамоля, Владислав Вікторович
dc.contributor.author Гамоля, Владислав Викторович
dc.date.accessioned 2023-05-03T20:22:23Z
dc.date.available 2023-05-03T20:22:23Z
dc.date.issued 2023-04-10
dc.identifier.citation Melnyk, V., Hamolia, V. (2023). Investigation of reconfigurable hardware platformsfor 5G protocol stack functions acceleration. Аpplied Aspects of Information Technology, Vol. 6, N 1, р. 84–99. en
dc.identifier.citation Melnyk, V. Investigation of reconfigurable hardware platformsfor 5G protocol stack functions acceleration / V. Melnyk, V. Hamolia // Аpplied Aspects of Information Technology = Прикладні аспекти інформ. технологій. – Оdesa, 2023. – Vol. 6, N 1. – P. 84–99. en
dc.identifier.issn 2617-4316
dc.identifier.issn 2663-7723
dc.identifier.uri http://dspace.opu.ua/jspui/handle/123456789/13464
dc.description.abstract Open RAN and 5G are two key technologies designed to qualitatively improve network infrastructure and provide greater flex-ibility and efficiency to mobile operators and users. 5G creates new capabilities for high-speed Internet, Internet of Things, telemedi-cine and many other applications, while Open RAN enables open and standardized network architectures, which reduces cost and risk for operators and promotes innovations. Given the growing number of users and data volumes, the purely software implementa-tion of certain functions of the 5G protocol, and especially computationally complex ones, requires significant computer resources and energy.These, for example, arelow-density parity-check (LDPC)coding,FFTandiFFT algorithms on physical (PHY)layer, and NEA and NIA security algorithms on Packet Data Convergence Protocol (PDCP)layer. Therefore, one of the activity areas in the development of means for 5G systems isthe hardware acceleration of such functions execution, which provides the possibility of processing large volumes of data in real time and with high efficiency. The high-performance hardware basis for implementing these functions today is field-programmable gate array(FPGA)integrated circuits.Along with this, the efficiency of the 5G protocol stack functions hardware acceleration depends significantly on the size of the data packets transmitted to the hardware accelerator. As ex-perience shows, for certain types of architecture of computer systems with accelerators, the acceleration value can take even a nega-tive value. This necessitates the search for alternative architectural solutions for the implementation of such systems.In this article the approaches for hardware acceleration using reconfigurable FPGA-based computing components are explored, their comparative analysis is performed, and architectural alternatives are evaluated for the implementation of a computing platform to perform the functions ofthe 5G protocol stack with hardware acceleration of PHY and medium access control(MAC)layers functions. en
dc.language.iso en en
dc.publisher Nauka i Tekhnika en
dc.subject Open radio access network en
dc.subject 5G en
dc.subject hardware acceleration en
dc.subject field programmable gate array en
dc.title Investigation of reconfigurable hardware platformsfor 5G protocol stack functions acceleration en
dc.title.alternative Дослідження реконфігуровних апаратних платформ для прискорення виконання функцій стеку протоколів 5G uk
dc.type Article en
opu.citation.journal Applied Aspects of Information Technology en
opu.citation.volume 1 en
opu.citation.firstpage 84 en
opu.citation.lastpage 99 en
opu.citation.issue 6 en


Файлы, содержащиеся в элементе

Этот элемент содержится в следующих коллекциях

Показать сокращенную информацию