A method of common signal monitoring in FPGA-based components of safety-related systems

Abstract

Traditional solutions in ensuring the functional safety of safetyrelated systems and their digital components based on methods and means of testing and on-line testing, as well as fault-tolerant structures, including majority schemes using multi-version technologies to counter common cause failures are considered. The limitation of these approaches by the logical checkability of digital circuits in the structural, structurally functional, and dual-mode versions is shown. Multi-version solutions are aimed at countering common cause failures, including common control faults related to reset, synchronization signals and other common signals that can block digital components and their checking circuits in a state identified as working. However, faults in chains of common signals can also be addressed to hidden faults, which remain a problem in safety-related systems. The logical checkability of the circuits decreases from structural to dual-mode and increases with the reduction of matrix structures. The maximum reduction is achieved in bitwise pipelines. The successes of green and FPGA technologies created the conditions for the development of online testing methods based on an assessment of energy consumption. These methods can significantly complement the logical checking. A method for monitoring common signals by estimating consumption currents in circuits of bitwise pipelines using the example of a shifting register is proposed. The results of experimental confirmation of the effectiveness of the proposed method is achieved.